The present invention relates to a semiconductor device functioning as a high-breakdown-voltage semiconductor power device to be placed in an inverter, for example, and more particularly relates to a method for increasing the current driving capacity and breakdown voltage of the device.
A semiconductor device, in which an insulating gate electrode and source electrodes are formed on the upper surface side of a semiconductor substrate and a drain electrode is formed on the lower surface side thereof so that a wide region in the semiconductor substrate is used for passing a large current in a vertical direction, is conventionally known as a semiconductor power device to be placed in an inverter, for example.
FIG. 4 is a cross-sectional view of a semiconductor power device called a DMOS device, which is disclosed in the document (Silicon Carbide; A Review of Fundamental Questions and Applications to Current Device Technology, edited by W. J. Choyke, H. Matsunami, and G. Pensl, Akademie Verlag 1997 Vol.II pp.369-388).
As shown in the drawing, the semiconductor power device includes: an SiC substrate 111 (6Hxe2x80x94SiC substrate) containing an n-type impurity at a high concentration; an n-SiC layer 112 (drift region), which is formed in an epitaxial layer formed on the SiC substrate 111 and which contains an n-type impurity at a low concentration; a gate insulating film 116 formed on the epitaxial layer; a gate electrode 118 formed on the gate insulating film; source electrodes 119 formed so as to surround the gate electrode 118 on the epitaxial layer; a drain electrode 117 formed on the lower surface of the SiC substrate 111; p-SiC layers 113 formed by doping, with a p-type impurity, regions in the epitaxial layer, each of which is present from under each source electrode 119 to under associated edges of the gate electrode 118; n+ SiC layers 114 formed by doping regions in the epitaxial layer that are located under the edges of the source electrodes 119 with an n-type impurity at a high concentration. In the semiconductor power device, the n+ SiC layers 114 function as source regions, regions in the p-SiC layers 113 that are located near the interface with the gate insulating film 116 function as a channel region, and the SiC substrate 111 and the n-SiC layer 112 function as a drain region. The n-SiC layer 112, in which carriers move due to drift diffusion, is typically called a drift region. When the semiconductor power device is turned ON, a voltage of about 5 V is applied to the gate electrode 118, the source electrodes 119 are grounded, and a voltage of several volts is applied to the drain electrode 117. At this time, by an operation similar to that performed in an ordinary MOSFET, a current flows from a region in the n-SiC layer 112, which is located under the gate electrode 118, to the n+ SiC layers 114 through the p-SiC layers 113.
Specifically, the semiconductor power device (DMOS device) has the structure in which the pattern of the gate electrode 118 and the source electrode 119 is formed over a wide range over the SiC substrate 111 so that a large current can flow in a vertical direction through a wide region in the substrate. Particularly, since SiC has a wide bandgap, the semiconductor power device can exhibit a breakdown voltage higher than a semiconductor power device using an Si substrate.
An IGBT is also known as a power device in which a current flows in a vertical direction. The basic structure of an IGBT is substantially the same as that of a DMOS device, except that a drift region and a semiconductor substrate show mutually opposite conductivity types in the IGBT. In a DMOS device, an n-type epitaxial layer is grown on an n-type substrate, for example. However, for the case of an IGBT, an n-type epitaxial layer is grown on a p-type substrate, for example. For instance, if a p-type substrate rather than the n-type one is provided as the SiC substrate 111 shown in FIG. 4, an IGBT can be formed.
However, the semiconductor power devices such as the conventional DMOS device and IGBT have the following drawbacks.
When the DMOS device or IGBT is reverse-biased, depletion layers 115 are extensively created in the n-SiC layer 112 (drift region) as shown by the dashed lines in FIG. 4. In that situation, the width of the depletion layers 115 narrows in the surface portion of the n-SiC layer 112 that is located under the gate electrode 118. As a result, an electric field that is applied to the depletion layers 115 increases in the surface portion of the n-SiC layer 112 serving as the drift region. Therefore, a dielectric breakdown is likely to be caused in this portion.
In addition, in order to increase the breakdown voltage of the conventional DMOS device or IGBT, the p-SIC layers 113 need to have their impurity concentration increased. In that case, however, the channel resistance is increased and thus the current driving power decreases. That is, there is a trade-off relationship between low resistance and high breakdown voltage. This imposes limitations on improvement of the performance of the semiconductor power device.
An object of the present invention is to provide a semiconductor device which functions as a semiconductor power device having a high current-driving-power and a high breakdown voltage by lessening the trade-off between low resistance and high breakdown voltage.
An inventive semiconductor device includes: a semiconductor substrate; a compound semiconductor layer formed on the principal surface of the semiconductor substrate; a gate insulating film formed on the compound semiconductor layer; a gate electrode formed on the gate insulating film; a source electrode formed at a side of the gate electrode on the compound semiconductor layer; a drain electrode formed on a face of the semiconductor substrate, the face being opposed to the principal surface of the semiconductor substrate; a source region, which is formed in the compound semiconductor layer and contains an impurity of a first conductivity type, the source region being present from under a part of the source electrode to under associated edges of the gate electrode; an active region, which is formed in the compound semiconductor layer, contains an impurity of the first conductivity type, and functions as a region where carriers travel, the active region being located beneath the gate electrode; a drift region, which is formed in the compound semiconductor layer and contains an impurity of the first conductivity type, the drift region being located under the gate electrode; an oppositely doped region, which is formed between the drift region and the source region in the compound semiconductor layer and contains an impurity of a second conductivity type, wherein the active region includes one or more first semiconductor layers and one or more second semiconductor layers which contain an impurity for carriers at a concentration higher than the one or more first semiconductor layers and are smaller in film thickness than the one ore more first semiconductor layers and from which carriers spread out to the one or more first semiconductor layers due to a quantum effect.
In the inventive device, quantum levels resulting from a quantum effect occur in the second semiconductor layer in the active region, and the wave function of carriers localized in the second semiconductor layer expands to a certain degree. What results is a state of distribution in which carriers are present not only in the second semiconductor layer but also in the first semiconductor layer. In other words, the resultant state is that carriers have spread out from the second semiconductor layer to the first semiconductor layer due to a quantum effect. If the potential of the active region is increased in this state, carriers are constantly supplied to the first and second semiconductor layers, and the carriers travel in the first semiconductor layer that is low in impurity concentration. This reduces scattering by impurity ions, allowing a high channel mobility to be obtained. On the other hand, when the device is in the off state, the whole active region is depleted and carriers are not present in the active region. Consequently, the breakdown voltage is defined by the first semiconductor layer which is low in impurity concentration, so that a high breakdown voltage can be obtained in the entire active region. Accordingly, in the device having the structure in which the active region of the first conductivity type is utilized so that a large current can flow between the source and drain, a high channel mobility and a high breakdown voltage can be achieved at the same time.
When the semiconductor substrate is of the first conductivity type, the above-mentioned effects can be attained in a semiconductor device functioning as an ACCUFET.
When the semiconductor substrate is of the second conductivity type, the above-mentioned effects can be attained in a semiconductor device functioning as an IGBT.
When the active region is formed by stacking a plurality of the first semiconductor layers and a plurality of the second semiconductor layers, the above-mentioned effects can be attained with certainty.
The one ore more second semiconductor layers are preferably made of silicon carbide, and the thickness of each of the one or more second semiconductor layers is preferably at least one monolayer and less than 20 nm.
The one or more first semiconductor layers are preferably made of silicon carbide, and the thickness of each of the one or more first semiconductor layers is preferably not less than 10 nm and not more than 100 nm.
When the inventive device further includes at least one heavily doped layer, which is formed laterally in the drift region to extend throughout the entire area of the drift region and which contains an impurity of the first conductivity type at a concentration higher than the drift region, it is ensured that depletion layers expand horizontally, which provides a semiconductor device having a higher breakdown voltage.
When the inventive device further includes an opening that reaches the oppositely doped region through the source region, wherein the source electrode is formed on wall surfaces of the opening and is in direct contact with a part of the source region and a part of the oppositely doped region, the source electrode can be formed on a region other than a region whose surface is in a bad condition or which has many defects therein. Thus, characteristics such as a high breakdown voltage can be obtained.
An inventive method for fabricating a semiconductor device includes the steps of (a) forming a compound semiconductor layer of a first conductivity type on the principal surface of a semiconductor substrate; (b) forming an oppositely doped region by introducing an impurity of a second conductivity type into a part of the compound semiconductor layer; (c) forming, on the compound semiconductor layer and the oppositely doped region, an active region including one or more first semiconductor layers and one or more second semiconductor layers which contain an impurity for carriers at a concentration higher than the one ore more first semiconductor layers and are smaller in film thickness than the one or more first semiconductor layers and from which carriers spread out to the one or more first semiconductor layers due to a quantum effect; (d) forming a source region by introducing an impurity of the first conductivity type into at least an area of the active region, the area being located on the oppositely doped region; (e) forming an opening that reaches the oppositely doped region by removing a part of the active region, the part being located on the oppositely doped region; (f) forming a gate insulating film on the active region; (g) forming a source electrode that is in contact with both a part of the source region and a part of the oppositely doped region, the parts being exposed within the opening; and (h) forming a gate electrode on the gate insulating film.
According to the inventive method, the source electrode and the oppositely doped region can be in contact with each other without introducing, into the source region, an impurity of the same conductivity type as that of the oppositely doped region in the step (e). Thus, a semiconductor device functioning as a high-performance ACCUFET or IGBT can be provided.
In the step (a), the compound semiconductor layer is preferably formed by an epitaxial growing method using in-situ doping with an impurity of the first conductivity type.
When in the steps (a) and (c), SiC layers are formed as the compound semiconductor layer and the active region, respectively, provided is a semiconductor device that functions as a power device utilizing the SiC layers with a wide bandgap and a high breakdown voltage. In that case, since the impurity ions implanted have a low activation rate in the SiC layers, defects are likely to occur in a region defined by the ion implantation. By forming the source electrode in the opening, however, it is possible to avoid the creation of such a region having many defects.